timescale compiler directive

Timescale derivative shows reference time unit for module.

`timescale <reference_time_unit> / <time_precision>

reference_time_unit :

For example :

`timescale 100 ns / 1 ns

This means delay written in module will have time unit of 100ns.

`timescale 100 ns / 1 ns

module dummy1;
reg toggle;
always #5
begin
//This will be displayed at every 500ns
$display("%d , In dummy1 ", $time);
end
endmodule

`timescale 1 us / 1 us
module dummy2;
always #5
begin
//This will be displayed at every 5us
$display("%d , In dummy2 ", $time);
end
endmodule

Output : 

                   5 , In dummy1 
                  10 , In dummy1 
                  15 , In dummy1 
                  20 , In dummy1 
                  25 , In dummy1 
                  30 , In dummy1 
                  35 , In dummy1 
                  40 , In dummy1 
                  45 , In dummy1 
                   5 , In dummy2 

time_precision :

`timescale 1ns/1ns
module tim();
reg i;
time delay_time = 7.721234;
initial
begin
  i=0;
  #5.7212678;
  i=1;
  //Below Statement will be displayed at (5.7212678*1ns) with 
  //decimal point rounded up to (1ns/1ns=10^0) 0 point
  $display("STATEMENT 1 :: time is %t ",$realtime);
  $display("STATEMENT 2 :: time is %t ",$time);
  $display("STATEMENT 3 :: delay_time %t",delay_time );
  #10;
  $finish;
end
initial
begin
  $dumpfile("dump.vcd");
  $dumpvars;
end
endmodule

Output :
STATEMENT 1 :: time is                    6 
STATEMENT 2 :: time is                    6 
STATEMENT 3 :: delay_time                    8


i will be toggled at 6 ns in waveform

`timescale 10ms/1ns
module tim();
reg i;
time delay_time = 7.721234;
initial
begin
  i=0;
  #5.7212678;
  i=1;
  //Below Statement will be displayed at (5.7212678*10ms) and after 
  //that decimal point rounded up to (1ms/1ns=10^6) 6 point
  $display("STATEMENT 1 :: time is %t ",$realtime);
  $display("STATEMENT 2 :: time is %t ",$time);
  $display("STATEMENT 3 :: delay_time %t",delay_time );
  #10;
  $finish;
end
initial
begin
  $dumpfile("dump.vcd");
  $dumpvars;
end
endmodule

Output :
STATEMENT 1 :: time is             57212678 
STATEMENT 2 :: time is             60000000 
STATEMENT 3 :: delay_time             80000000


i will be toggled at 57212678 ns in waveform

Note : Real and Realtime are two data type supported by System Verilog. As per the specification, both are treated synonymously and can be used interchangeably.

                  
What the timescale unit and precision are taken when a module does not have any time scalar declaration in RTL? 

In SV

timeunit 100ps;

timeprecision 10fs;

is as same as `timescale 100ps/10fs in Verilog